Wed 19 August 2026 /

#rtl #synthesis #open-source

A Practical Guide to Hardware Design Space Exploration

The reproducible workflow behind the area and timing measurements from our previous experiment.

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Wed 12 August 2026 /

#rtl #synthesis #open-source

Exploring Optimal Hardware Implementations with Hydra and OpenROAD

Measuring area and timing tradeoffs across hardware designs using open source tools.

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Fri 07 August 2026 /

#rtl #documentation #open-source

From Source to Documentation: Using sphinx-svdomain

With sphinx-svdomain, SystemVerilog source and docstrings become clear, linked documentation that is easy to browse and rebuild as the RTL changes.

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Mon 27 July 2026 /

#rtl #documentation #open-source

Releasing sphinx-svdomain: Structured Documentation for SystemVerilog

Hardware APIs deserve searchable documentation with reliable links between declarations. We are releasing sphinx-svdomain to help close that gap.

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Mon 20 July 2026 /

#renode #accelerators #open-source

Building a Full-System Accelerator Prototype with Renode

An open-source full-system workflow that connects PyTorch, a Linux driver, and Verilated RTL inside a Renode-simulated SoC before physical hardware is ready.

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Wed 01 July 2026 /

#pytorch #accelerators #software

Building a PyTorch Backend for a Custom Accelerator

Custom AI hardware creates value when repeated model operations can be moved into workload-specific datapaths for better latency, power, and integration. This post shows a small PyTorch-facing prototype that connects ordinary tensor code to that hardware path.

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Fri 26 June 2026 /

#rtl #verification #open-source

Shipping Competitive RTL with Open Source Tools

A phase-by-phase RTL workflow that keeps modeling, generation, verification, synthesis, and timing open without closing the door to commercial backends.

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Wed 17 June 2026 /

#rtl #verification #cocotb

Lightweight RTL Verification Flow with cocotb

A lightweight verification workflow for building RTL with golden models, standard streaming interfaces, and composable blocks.

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Wed 10 June 2026 /

#rtl #algorithms

Parallelizing Linear Feedback Systems with Matrices

Many “serial feedback” circuits look inherently sequential, but if their state update is linear over a finite field, we can raise the transition matrix to process many input symbols per clock.

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